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This paper examines the impact of collector-base space charge region (CB SCR) on RF noise in scaled bipolar transistors by solving the Langevin equation of electron noise transport. The van Vliet model, which was derived for intrinsic base only, was evaluated for scaled bipolar transistors in which CB SCR transit time is most significant. An improved noise model accounting for CB SCR effects is derived
This paper presents a new technique to determine the base and emitter resistances of BJTs. The method is based on analysis of intrinsic and extrinsic conductances, which can be calculated from forward Gummel DC data at different Vcb, and explicitly accounts for the difference between DC and AC values of base resistance
High-performance RF-LDMOS, medium voltage (8-12V), and high voltage (20-40V) NLDMOS and PLDMOS devices, integrated in a modular 0.18 mum analog CMOS/RFCMOS technology platform, are described. Device design, process integration, manufacturability, and reliability issues are discussed. These devices are among the highest performance in their class. The successful integration of these devices has enabled...
A new forced emitter current method is proposed for the simultaneous measurement of collector and substrate series resistance in bipolar transistors. Compared with conventional series resistance extraction method, this new method does not need any prior knowledge of certain device parameters, or any pre-selected bias condition. It can be used for any bulk bipolar technology
The design of a fully integrated RF switch on standard SiGe-CMOS technology is presented and discussed. A case study for 5-GHz indoor WLAN applications is reported. It allows on-chip T/R antenna switching operations providing better performance (typical total insertion losses are 0.2 and 0.9 dB, in R and T modes respectively) with respect to those obtained by using other solid-state devices as switching...
Integration of high voltage transistors and varactors with high tuning range into high frequency SiGe bipolar technologies is challenging due to the requirement of a shallow collector for the high speed transistor. This paper presents a high speed SiGe bipolar technology using a novel concept with two epitaxial layers for the simultaneous integration of high speed transistors, high voltage transistors,...
Notice of Violation of IEEE Publication Principles??A Low Power 12.5Gb/s SiGe Limiting Amplifier Using a Feed-forward Adjustable Threshold Loss-Of-Signal Detector??by Maxim, A. and Smith, D.in the Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting, October 2006, pp 1-4After careful and considered review, it has been determined that the above paper is in violation of IEEE's Publication...
This paper deals with the integration of a metallic emitter in a high-speed SiGe HBT technology. An innovative integration process called PRETCH is detailed, along with static and high-frequency electrical results. Hall Effect measurements down to 20 K on As-doped mono-emitter layers are also reported, which help understand the physics of hole injection in highly doped emitters. The optimization of...
For the first time, a high performance, low leakage Schottky barrier diode (SBD) with cutoff frequency above 1.0 THz in a 130nm SiGe BiCMOS technology for millimeter-wave application is described. Device optimization has been evaluated by varying critical process and layout parameters such as, anode size, cathode depth, cathode resistivity, junction tailoring, and guardring optimization is investigated
We demonstrate the integration, in 0.13μm thin SOI CMOS technology, of low-cost high-performance high-voltage LDMOS and HBT transistors. These specific devices are obtained, without affecting CMOS core process devices. Static and dynamic characteristics for both type of transistors are presented, showing state of the art devices suitable for RF/analog/digital system on chip integration.
We adapt the Mextram 504 compact model for Si and SiGe bipolar transistors to make it suitable for compact modeling of GaAs HBT's. We discuss the different physics included in the new model, Mextram 3500, and demonstrate the capabilities of the new model on GaAs HBT characteristic simulations. We also show an example of advanced GaAs PA-circuit simulations that have been performed with our model
This paper presents the design of a low power 3.5GHz analog programmable filter RFIC. The RF filter is a 7-tap transversal equalizer with cascaded Cherry-Hooper amplifiers for delay stages and Gilbert variable gain amplifier as tap weights. The delay stage using active devices greatly reduces the die area comparing to passive delay lines. The SiGe programmable filter RFIC consumes 250mW under 3.3V...
We present the first demonstration of a continuous-time, fifth-order, elliptic, gm-C low-pass active filter in 0.25 mum complementary (npn + pnp) silicon-germanium (C-SiGe) heterojunction bipolar transistor (HBT) technology. This C-SiGe technology features npn SiGe HBTs with peak fT and fmax of 170 GHz and 170 GHz, respectively, as well as pnp SiGe HBTs having fT and fmax of 90 GHz and 120 GHz, respectively...
The de-embedding of intrinsic device parameters from on-wafer measurements is a central problem in high frequency device measurement and modeling. The first quantitative analysis of the errors associated with de-embedding on-wafer s-parameter measurements of 90nm bulk FETs and 130nm SiGe HBTs taking into account the effects of non-ideal standards is presented. Four different on-wafer de-embedding...
A novel approach is described for the simultaneous extraction of the parasitic base and collector resistances along with the internal collector capacitance cjc of HBT/BJT devices. A strong impact of the external access resistances rbx and rcx on the accuracy of cjc extraction is revealed. The interaction is strictly observed at the determination of these and the internal base and collector resistance...
An asymmetrical spacer LDMOSFET integrated in a 0.25μm BiCMOS technology is presented. Improved RF performances are obtained with this new architecture: fT close to 35GHz with BVds larger than 15V. Process integration strategy is discussed. Impact on the other devices is described.
A compact model solution, consistent with the system theory for correlated base and collector shot noise sources, is derived and implemented in the bipolar transistor model HICUM using Verilog-A. Compiled (with Tiburon) Verilog-A model is simulated using ADS 2004A and the results are tested against measured noise parameters for high-frequency (fT at 150 GHz) SiGe HBTs. Very good agreement between...
This paper investigates the impact of fringe BE junction on base majority carrier RF noise in SiGe HBTs. Due to fringe effect, the base hole noise should be modeled by correlated noise voltage source and noise current source in hybrid representation. The noise voltage source can be modeled by a weakly bias dependent noise resistance that is different from the intrinsic base resistance. The correlation...
A broadband and scalable model is developed to accurately simulate on-chip inductors of various dimensions and substrate resistivities. The broadband accuracy is proven over frequencies up to 20 GHz, even beyond resonance. A new scheme of RLC networks is deployed for spiral coils and substrate to account for 3D eddy current, substrate return path, and spiral coil to substrate coupling effects, etc...
Several vertical IGBT electro-thermal models are currently available on circuit simulators. However, no reliable electro-thermal models have been proposed for the lateral insulated gate bipolar transistor (LGBT). In this paper, for the first time we present a fully coupled electrothermal model for a LIGBT structure based on a novel concept recently reported in (Napoli, et. al., 2005). The model relies...
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