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Grand challenge computational applications have been identified in a number of scientific and engineering disciplines, and significant attention has been placed on them in part due to the national High-Performance Computing end Communications (HPCC) Initiative. Computational tools are extensively used in designing computers, yet this has not been recognised as a grand challenge comparable in significance...
Semiconductor process, device, and circuit simulation plays a significant role in the development of integrated circuit technology, providing quick prototyping and quantities not easily measured. Predictive models allow optimization of chip designs and are an essential component of the technology design process. As semiconductor devices shrink into the deep-submicron regime, device simulation faces...
Binary Decision Diagrams (BDDs) are used extensively in VLSI CAD for verification, synthesis, logic minimization and testing. Parallel algorithms for Boolean Function Manipulation using BDDs have been proposed and implemented on a Connection Machine (CM-5). Abstractions have been developed to support the design of these algorithms using the message passing model of parallel programming. A Distributed...
Designers must pay careful attention to physical design details when designing high-speed circuits (/spl ges/1 GHz) because signal interactions become significant at high frequencies. Simulating these interactions is computationally demanding and requires the use of fast, efficient simulation algorithms and high-performance computers. Ensuring that these interactions do not degrade performance requires...
Presents a new algorithm for decomposing a Finite State Machine (FSM) to reduce the area and delay. For a known state encoding, it partitions the next state and output bits so as to decrease the cost, which is a function of the area and delay. A state encoding which yields a low cost is derived by using a heuristic algorithm. This algorithm differs from existing algorithms in that it uses a measure...
Describes a parallel solver for the nonlinear Poisson-Boltzmann equation modeling the distribution of an electrostatic potential in a MOSFET in three dimensions. The nonlinear system is solved with Newton's method. The linearized mathematical model is solved by the conjugate gradients method preconditioned by a parallel version of incomplete Cholesky factorization. This technique is easy to implement...
Methods of regular arrays can be used to specify, synthesize, transform, and verify arithmetic and coding modules for use in higher-level DSP systems. Although some designs and methodology have been proposed for bit level arrays, the author shows how regular array methods can be integrated into various stages of the synthesis process for DSP/arithmetic structures. As technologies rapidly advance,...
Many multiprocessor list scheduling heuristics that account for interprocessor communication delay have been proposed in recent years. However, no uniform comparative study of published heuristics has been performed in almost 20 years. This paper presents the results of a large quantitative study using random, but program-like input graphs. We found differences in the performance of the various heuristics...
This paper presents a methodology and a design environment to support validation and design space exploration for embedded systems including application specific digital signal processors prototyping. Our approach to heterogeneous system design is based on rapid prototyping integrated with a set of graphical design entry, synthesis, and analysis tools. System partitioning into a set of software and...
This paper describes a C++ class, fixpt /spl minus/ a new data type used for development of fixed point algorithms. Fixpt is designed to reduce the development time incurred during the conversion of floating point algorithms into equivalent fixed point implementations on fixed point processors or custom designed ASIC hardware. Fixpt allows each variable in a C++ program to be declared with a user...
The MGAP is a user programmable, multifunctional architecture. Its potential as a general purpose, high performance problem solver has been demonstrated in earlier papers. We describe its salient features and show that it solves DSP problems efficiently. With the current growing trend towards mobile communications and multimedia systems, low cost, small size and high performance are primary concerns...
ArMen is a parallel machine in which each node is coupled to an FPGA ring. The underlying idea is to complement an MIMD architecture with global coprocessors providing extra control and processing properties. The use of regular hardware patterns such as cellular automata or pipelines allows high level definitions of the coprocessors. The results are fast prototyping possibilities for specific applications...
The paper describes a parallel architecture for universal digital signal processing. This architecture uses not only multiply-accumulate but also nonlinear operations, such as reciprocal, squareroot, exponential, sine/cosine, etc. Several advanced algorithms can thus be mapped to this array architecture. Specifically, the paper focuses attention on two very diverse algorithms, namely the fast Fourier...
New field-programmable gate array (FPGA) technologies have increased the industrial interest in tools which map a DSP application and a set of performance constraints to a specific VLSI architecture. This paper presents an optimization methodology for mapping a DSP application and a set of performance constraints into an architecture targeted for FPGA technologies with user-programmable RAM blocks...
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