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This paper provides a comprehensive treatment of the design techniques of all-digital time integrators for time-mode signal processing (TMSP). A detailed examination of the principle, circuit implementation, operation, constraints, and limitations of time adders constructed from switched delay units (SDUs), dual discharge paths (DDP), and unidirectional gated delay lines (UDGDLs) is provided. It is...
This paper presents a low-power all-digital first-order single-bit delta-sigma time-to-digital converter (TDC) with a differential bi-directional gated delay line time integrator. The differential time integrator features low power consumption accredited to the use of only one bi-directional gated delay line in performing time integration, full compatibility with technology scaling, rapid time integration,...
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