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The characterization of nanometer CMOS transistors of different aspect ratios at deep-cryogenic temperatures (4 K and 100 mK) is presented for two standard CMOS technologies (40 nm and 160 nm). A detailed understanding of the device physics at those temperatures was developed and captured in an augmented MOS11/PSP model. The accuracy of the proposed model is demonstrated by matching simulations and...
This paper uses the simplified charge-based EKV MOSFET model for studying the effects of total ionizing dose (TID) on analog parameters and figures-of-merit (FoMs) of 28nm bulk MOSFETs. These effects are demonstrated to be fully captured by the five key parameters of the simplified EKV model. The latter are extracted from the measured transfer characteristics at each TID. Despite the very few parameters,...
Based on a novel approach of reading-out cantilever sensors with an exponential response of the measurement signal on adsorption of e.g. molecules, we study cantilever array sensors that enable the detection and discrimination of various different adsorbates. Different cantilever geometries and different ratios of functionalized and unfunctionalized areas on the cantilevers are used together with...
Here, the utilizing of lateral unidirectional bipolar-type insulated-gate transistors (Lubistors) for pH detection was demonstrated for the first time. The high on current and ambipolarity of Lubistors are favorable properties for reliable sensing application. The ultrathin Lubistors were fabricated on 20-nm-thick SOI substrates in planar geometry. The triode-like current-voltage characteristic and...
Ballisticity in 14nm-node FinFETs is investigated by Monte Carlo device simulation. Analytic doping profiles are reverse-engineered to measured transfer characteristics of FinFETs from literature and from this work and good agreement between Monte Carlo simulations and measurements is achieved without any device-parameter calibration. The ballistic ratio, defined as the ratio of the on-current with...
3D sequential integration requires top FETs processing with a low thermal budget (500°C). The analysis of the origin of the performance difference between Low Temperature (LT) MOSFET and high temperature standard process must take into account a potential EOT modification for short gate lengths. In this work, the difficulty of precise EOT extraction for scaled devices is observed by CV measurements...
The cut-off frequencies of silicon-germanium hetero-junction bipolar transistors (SiGe HBTs) have entered the THz range at the cost of high current density and relatively low breakdown voltages. Typically, the common-emitter breakdown voltage with open base (BVCEO) is used to indicate the allowed breakdown voltage related operation limit. However, an open base (i.e. an infinite source impedance) is...
The repeatability of set/reset errors has been investigated in 40nm TaOx based ReRAM cells. Errors of the Low Resistance State (LRS) in specific cells are observed repeatedly, and such cells are recovered by DC read operation. When error cells are recovered, the LRS cell current of the recovered cells shows a sudden jump up to large cell current in certain set cycles. Then, the High Resistance State...
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