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In this paper, we proposed a calibration strategy utilizing reference sensor for bio-detection based on GMR sensor. With this calibration strategy, temperature drift effect can be cancelled by about 85%, and the carrier signal can be reduced by 26dB enabling a dynamic range adjustment for quantization. A 90% reduction of front-end common mode noise and error, and a sensitivity of 50ppm or 600 200nm-diameter...
This paper presents a conjugate gradient algorithm of convergence speed and accuracy in pipelined ADCs. The pipeline ADC error acts as the objective function of the method. The objective function gradient gradually produce conjugate direction which acts as the search direction to obtain the minimum point, where, the search direction is just a combination of the negative gradient direction with the...
Linear amplification with nonlinear components (LINC) is an attractive technique to achieve linearity amplification with high efficiency. The linearity and resolution of the delay line play a great important role for the performance of LINC transmitters. In order to overcome the limitation of linearity and resolution, a delay-based all-digital phase modulator with calibration algorithm is proposed...
A novel calibration algorithm called Dynamic Mismatch Compensation is proposed to reduce amplitude, delay and duty-cycle errors of MSB current cells (MSBs) in current-steering DACs. The DMC algorithm, suitable for high resolution and high speed DAC applications, can improve the SFDR by more than 10dBc, according to the behavioral-level DAC simulation results in Matlab. Transistor-level simulation...
An off-chip calibration technology for the 6 Bit 30 Gsps time-interleaved ADC is presented in paper. The mismatches errors are calculated by calibration algorithm base on statistical approximation method. Negative feedback is used to reduce the three mismatches (skew, offset and gain mismatch). The off-chip calibration technology is implemented by FPGA. The measured results show that the average ENOB...
This paper presents that techniques of mathematics, such as number theory, statistics, coding theory, modulation, control theory, and signal processing algorithms besides transistor-level circuit design are required to enhance the performance of analog/mixed-signal circuit performance. Several research examples in the authors' laboratories are shown.
In traditional pipelined ADCs, errors originated by capacitance mismatch, finite amplifier gain, incomplete settling and offset. To overcome capacitance mismatch for >=2.5-bit/stage MDAC architecture, a new background digital calibration strategy is proposed in this paper. Based on this technique, a 14-bit, 40MS/s pipelined ADC is implemented. The simulation results show that ENOB is improved from...
A 12-bit 250MSPS Pipeline ADC with serial output interface is presented. The pseudo random (PN) calibration technique is used to improve the dynamic performance in the high speed ADC. A integrated serial output interface is implemented to convert 12 bit parallel data into a differential serial data stream. The whole pipeline ADC was fabricated in 180nm 1.8 V 1P5M CMOS process. Test results show that...
The feasibility of the scheme to realize the novel bulk acoustic wave (BAW) sensor readout circuit has been verified by simulation, but further experimental verification is needed. Using the film bulk acoustic resonator (FBAR) with about 1.5 GHz series resonant frequency as the device under test (DUT), we designed and fabricated microstrip six-port network and detector on PCB which meet the requirements...
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