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Wireless software updates for vehicles are very beneficial for both customers and manufacturers, as they enable performance improvements and error correction without the need of vehicle recalls, as well as a reduction of warranty costs and continuous system upgrades over a vehicle's whole lifetime. However, adding a wireless interface to enable software updates over the air may also expose the vehicle...
Usually, arithmetic units represent numeric data-types employing fixed-length representations. For instance, hardware representations of real numbers usually employ fixed-length formats defined by the IEEE Standard 754 (32-bit single-precision, 64-bit double-precision, , floating-point numbers). Fixed-length representations allow simpler and faster arithmetic units than variable-length representations...
Approximate TMR (ATMR) is an approach towards logic masking of soft errors through utilization of approximate circuit modules in order to achieve performance benefits such as area, delay and power consumption. In this work, we propose a novel technique for efficient utilization of acceptable error rate threshold for error resilient applications to perform logic masking. The novelty of the method lies...
Power-analysis (PA) based side-channel attacks are effective methods to attack RSA encryption systems and elliptic-curve cryptography (ECC). In this paper, we describe PA-based side-channel attacks aiming to extract the (randomly chosen) private key for an ECC-based cryptosystem in detail. We assume that for the cryptosystem to be attacked the private key will not be available for more than one basic...
This paper presents a novel FPGA-based design for the lightweight block cipher PRESENT and its implementation results. The proposed design allows to study area-performance trade-offs and thus constructing smaller or faster implementations. When optimized by area, the proposed design exhibits smaller latency and fewer FPGA resources than representative related works in the literature.
Multi-FPGA prototyping, because of its low cost, high speed, and real world testing is quite popular today for pre-silicon verification of increasingly complex designs. In this work, we present a novel exploration flow that is used to analyze and optimize the multi-FPGA based prototyping of complex digital designs. In this flow, an end-to-end experience starting from benchmark generation to optimized...
The heating system, the second largest energy consumer after the power train in electric vehicles (EV), has a significant impact on the overall energy management. We propose an optimized control algorithm for minimizing the energy consumption of the heating system for the passenger cabin. The presented adaptive control strategy combining a learning algorithm and dynamic programming optimizes the amount...
In the last years, the need for enhancing health and preventing problems with remote monitoring is increasing. A non-invasive low-cost technique for processing bio-signals and monitoring vital parameters, at rest and during physical activity, is the use of wearable PhotoPlethysmoGraphic (PPG) systems. However, in order to detect a relevant vital parameter, such as the heart rate during demanding exercises,...
Digital healthcare devices have attracted many attentions in recent years. In particular, the cardiovascular system is always an important target of such digital healthcare devices. In this paper, we present a neural network-based low-power online ECG analysis and monitoring system. Electrocardiogram (ECG) is a representation of the heart's electrical activity recorded from electrodes on the body...
This paper presents a custom hardware architecture for fast, low-power super-resolution in infrared images. The architecture performs multiple-frame registration using the Lukas-Kanade optical flow algorithm with Gaussian pyramids, and uses a custom-designed reconstruction algorithm that generates a high-resolution image from multiple consecutive video frames with comparatively low computational cost...
We describe an embedded system architecture that implements a real-time multimodal registration method which enables multicamera spatio-temporal feature extraction from the combination of visible and long-wave infrared image sequence. Image registration is performed by matching common features between each frame of a visible image to each frame of an infrared image sequence, in order to estimate an...
Technology shift and voltage scaling increased the susceptibility of Static Random Access Memories (SRAMs) to errors dramatically. In this paper, we present NS-SRAM, for Neighborhood Solidarity SRAM, a new technique to enhance error resilience of SRAMs by exploiting the adjacent memory bit data. Bit cells of a memory line are paired together in circuit level to mutually increase the static noise margin...
The Automatic Urban and Rural Network (AURN) [1] is a set of high quality reference monitoring sites for recording air quality in the United Kingdom. They are costly to install and expensive to run, and are therefore limited in numbers. The data from these networks are used to inform regulatory compliance with the Ambient Air Quality Directives [2]. There is also a requirement to monitor air pollution...
The downscaling of transistor feature sizes has led to integrated circuits that are more susceptible to various fault effects. In order to meet dependability requirements, appropriate fault tolerance techniques have to be applied. This adds another challenging task to the design process of integrated circuits, which has to include a careful evaluation of costs and benefits of different fault-tolerant...
We present a hyperspectral camera system that uses realtime polynomial based non-uniformity correction (NUC). The system level description of the camera is provided in the paper as well as measurements required to perform such correction. The polynomial correction offers high dynamic range data processing, it does not require multiple temporal image processing, it provides high quality results, but...
This paper proposes a method improving the fault-coverage capabilities of Field Programmable Gate Array (FPGA) designs. Faults are mostly single event upsets (SEUs) in the configuration memory of SRAM-based FPGAs and they can change the functionality of an implemented design. These changes may lead to crucial mistakes and cause damage to people and environment. The proposed method utilizes Concurrent...
The use of increasingly complex hardware and software platforms in response to the ever rising performance demands of modern real-time systems complicates the verification and validation of their timing behaviour, which form a time-and-effort-intensive step of system qualification or certification. In this paper we relate the current state of practice in measurement-based timing analysis, the predominant...
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