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In this work, we study the impact of Si and Al implantation on the current conduction mechanisms and operation of 1T-1R TiN/HfO2/Ti/TiN based ReRAM devices. The pre-forming current and forming voltage evolution clearly reveal different trends as a function of the implanted dose and species. We link our results to the microscopic structure of the material using a first principles approach.
We present the design and measurement of a continuous-time, accelerated, reconfigurable Leaky Integrate and Fire (LIF) neuron model emulated in 65-nm CMOS technology. The neuron circuit is designed as a sub-circuit of our highly integrated neuromorphic prototype chip, the “HICANN-DLS”. The design is geared towards testability and debug features, as well as area and power efficiency. Each neuron in...
3D VLSI with a CoolCube™ monolithic integration flow allows vertically stacking several layers of devices with a unique connecting via density above tens of million/mm2. This results in increased devices density and gains in power and performance thanks to wire-length reduction without the extra cost associated to transistor scaling. In addition to power saving, this true 3D integration opens perspectives...
While the 3D sequential process is still under development, the electrical influence of specific process for the bottom tier needs to be studied. As another MOS transistor layer is fabricated on top of the bottom one, contamination risk and thermal stability issues appear, thus requiring adaptation of conductors/dielectrics for intermediate Back-End Of Line (iBEOL) processing. As materials differ...
In this paper, we report an accurate physics-based compact model for monolayer Graphene Field-Effect Transistors (GFETs) based on the density of states (DOS) of monolayer graphene. The charge-based model computes the total current considering a branch separation between the electron and hole contributions preserving a good accuracy near the Dirac point. The effect of back-gate is included in the charge...
Building reliable mixed-signal circuits in advanced process technologies requires an accurate understanding of device performance and variability. This work presents an on-chip transistor characterization platform built on a digital focal plane array readout circuit framework that enables highly parallel device measurements to be taken in the digital domain. This technique is used to quickly assess...
The lack of dynamic stability in memory circuits such as the Static Random Access Memory can lead to read/write failures or power supply limitations. In this work, the impact of low-frequency and random telegraph noise on the dynamic variability of a single SRAM cell is examined for the first time. The dependence on device noise level, speed and duration of operation is investigated, using the Supply...
In the present work we will show our complementary TFET technology, which allows for the co-planar integration of InAs/Si p-TFETs and InAs/GaSb n-TFETs. We demonstrate both types of devices, show the results of the electrical characterization at room temperature and down to 125K. The p-TFETs exhibit excellent performance with Ion of a couple of µA/µm (|VGS| = |VDS| = 0.5V) combined with average subthreshold...
This paper presents for the first time a TFET/CMOS hybrid CAM architecture designed to address the requirements for ULP (Ultra-Low Power) applications like the IoT (Internet of Things). Proposed design is low power, area efficient and re-configurable i.e. can either be used as CAM or normal SRAM or as a combination of both. The simulation extractions for power and speed are done including wiring and...
The discovery of ferroelectricity in HfO2 and ZrO2 based dielectrics enabled the introduction of these materials in highly scalable non-volatile memory devices. Typical memory cells are using a capacitor or a transistor as the storage device. These scaled devices are sensitive to the local structure of the storage material, here the granularity of the dielectric doped HfO2 layer, varying the local...
This paper presents the fabrication, electrical characterization, and simulation of planar single electron transistors. Two single electron transistors facing each other have been used to demonstrate single charge detection. The manufacturable fabrication process combined with both single charge detection and the simulation tool are a powerful platform for quantum cellular automata that can be applied...
Ferroelectric random access memories (FRAM) are nonvolatile memories which allow a fast access time and a low power consumption. State-of-the-art devices are based on the perovskite lead zirconate titanate (PZT), which suffers from CMOS incompatibility resulting in scaling issues. The discovery of the ferroelectricity in doped hafnium oxide enabled scaled 3D memory devices. A variety of dopants has...
Low voltage transistors are being developed to achieve steep, less than 60 mV/decade, subthreshold swings at room temperature. This paper outlines progress, technical challenges, and applications for these devices.
A novel sharp switching Z2-FET DGP device (Zero Impact Ionization and Zero Subthreshold Slope FET with Dual Ground Planes) relying on band modulation mechanism is presented in this paper. The device is fabricated in the most advanced FDSOI (Fully Depleted SOI) technology with Ultra-Thin Body and Buried Oxide (UTBB). The Z2-FET DGP is an upgraded version of Z2-FET. It features sharp on-switch, adjustable...
Quantum computers have the potential to revolutionize information technology as we know it by solving certain relevant and interesting problems, using fundamentally fewer resources (number of computational steps) compared with even the fastest supercomputers. While critical aspects of quantum computing are being demonstrated in laboratories across the world, a fully functional and practical quantum...
A 32-bit icyflex2 processor operating over a wide supply range (WSR) is presented, showing a very low energy consumption in comparison to other state-of-art 32-bit processors. Operating under very different supply conditions involves tremendous differences in operating frequency, and a large sensitivity to process and temperature variations at low-voltage, which both tend to complicate timing closure...
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