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This study describes the fabrication of molybdenum disulfide (MoS2) field-effect transistors (FETs) using adhesion lithography and self-assembled monolayer (SAM)-based gate dielectrics. The adhesion lithography involves the formation of a SAM on metal oxides and selective removal of metal layer from the surface of SAM. Electrical characteristics of MoS2 FETs in this study resemble those of MoS2 FETs...
This paper presents the design exploration of a basic cascode circuit (CAS) targeted to increase the intrinsic gain Aν of a graphene field-effect-transistor (GFET) by decreasing its output conductance go. First, the parameters of a large-signal compact-model, based on drift-diffusion carrier transport, are fit to measurements carried on 2 CVD GFETs, fabricated independently by different research groups...
We investigated the floating gate memory based on MoS2 channel with metal nanoparticle charge trapping layer and polymer tunneling dielectric. Here, highly conformal and stable polymer insulator layer deposited via initiated chemical vapor deposition (iCVD) facilitates the fabricated floating gate memory to endure a substantial electrical stress significantly. To form a selective density and controllable...
While the 3D sequential process is still under development, the electrical influence of specific process for the bottom tier needs to be studied. As another MOS transistor layer is fabricated on top of the bottom one, contamination risk and thermal stability issues appear, thus requiring adaptation of conductors/dielectrics for intermediate Back-End Of Line (iBEOL) processing. As materials differ...
This paper presents the fabrication, electrical characterization, and simulation of planar single electron transistors. Two single electron transistors facing each other have been used to demonstrate single charge detection. The manufacturable fabrication process combined with both single charge detection and the simulation tool are a powerful platform for quantum cellular automata that can be applied...
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