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Approximate memory is a promising technology for emerging recognition, mining and vision applications. These applications require the processing of large volumes of data to achieve energy-efficiency with negligible accuracy loss. This paper proposes a multi-level approximate memory architecture based on data significance analysis. In this architecture, a memory array is divided into several separated...
Functional test guarantees that the circuit is tested under normal conditions, thus avoiding any over-as well as under-test issues. This work is based on the use of Software-Based-Self-Test that allows a special application of functional test to the processor-based systems. This strategy applies the so-called functional test programs that are executed by the processor to guarantee a given fault coverage...
In this paper, a low power 5-bit hybrid flasharchitecture is proposed. The proposed analog-to-digital con-verter (ADC) uses appropriate combination of both conventionaldouble-tail comparators and standard cell comparators. Stan-dard cell comparators are used to reduce power consumption. Thus, the proposed hybrid architecture results in extendeddynamic range when compared to standard cell and thresholdinverter...
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