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For the first time, we demonstrate that A-G model extracted from short Vg-accelerated stresses can predict both long term DC and AC NBTI under low and dynamic operation Vg. This is achieved by successfully separating non-saturating defects from the saturating ones, allowing reliable extraction of power exponents needed for long term prediction. Unlike R-D model, A-G model does not require solving...
This paper reports a novel material/process-based design for reliability-aware Ge gate stack for the first time. Initially good characteristics of Ge gate stacks do not necessarily guarantee the long-term device reliability. To overcome the big hurdle, we have investigated the stability of GeO2 network as well as the formation of new high-k. The very robust Ge gate stack with both 0.5 nm EOT and sufficiently...
The advantages of graphene diffusion barrier are studied and benchmarked to the industry-standard barrier material TaN for the first time. Even when the wire width is scaled to 10 nm, the effective resistivity of the Cu interconnect is maintained near the intrinsic value of Cu using a 3 Å single layer graphene (SLG) barrier. In the time dependent dielectric breakdown (TDDB) test, 4 nm multi-layer...
For the first time, AC lifetime in Si-cap/Ge and GeO2/Ge pMOSFETs is investigated and it must not be predicted by the conventional DC stress method with a measurement delay. This is because the energy alternating defects are generated in Ge devices but not in Si, which introduces additional generation under DC stress.
A test circuit for studying Electromigration (EM) effects under realistic high frequency AC stress was implemented in a 32nm High-k Metal Gate (HKMG) process. Four different stress patterns (DC, pulsed DC, square AC and real AC) can be generated using on-chip circuits. Local heaters are used to raise the die temperature to >300°C for accelerated testing. Experiment results over 52.7 hours show...
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