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We introduce for the first time a novel integration scheme of CBRAM cells, where the Cu electrode is patterned using a subtractive dry-etching process. We demonstrate excellent performances of 30nm-size cells (1µs-write at ≤50µA, >106 endurance, excellent retention at 150°C) as well as scaling potential of CBRAM down to 10nm-node using 5nm-thick Cu electrodes.
We have demonstrated the front-gate (FG) III-V single structure CMOS using ultra-thin body (UTB) InAs/InGaSb on insulator (-OI) on Si substrates with high hole mobility (μeff) of 240 cm2V−1s−1. We have found that the μeff is enhanced by the buffered-HF (BHF)-cleaned InAs MOS interfaces, Ni alloy S/D, and the InAs/strained InGaSb-OI hetero-interface channel. The CMOS operation using FG InAs/InGaSb-OI...
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