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Current studies about decoding Fast protocol in the FPGA platform are always implemented using serial communication technique and for some certain Fast Templates. This paper presents the FPGA hardware design of accelerating the decoding process in parallel and cutting down the cost of changing Fast Templates with flexible decoders. The complete system has been simulated and tested in SystemC Platform.
Network coding has been proven as a very promising technique to improve wireless network throughput and energy-efficiency (EE). Meanwhile, cooperative caching, which allows the sharing and coordination of cached data among multiple nodes, can improve the performance of data access. In this paper, we aim at exploiting the potential benefits brought by cooperative caching for the multi-rate wireless...
The tremendous growth of the Internet application has driven wider efforts to advanced future Internet architecture especially Content-Centric Networking. In this paper we propose a Centralized Architecture for ICN (CAN), which efficiently combines Content-Centric Networking and network coding (NC). In order to achieve optimal coding performance, we design a global controller which is mainly responsible...
BCH code for correcting distributive errors has been widely used in Nand Flashes with data-based mobile systems around the world, and its decoding process is often followed by Chien search, which calculates the roots of a polynomial in finite fields by substitution and testing. Usually, BCH decoding can be accelerated by parallel syndrome computation and Chien search. In the past years the parallel...
The current distributed storage systems mainly rely on data replication to ensure certain level of data availability and reliability. A recent trend is to introduce erasure codes into the distributed storage. Inspired by the RAID system, early attempts have been focused on designing Reed-Solomon (RS) based solutions and other block codes including Low Density Parity Check (LDPC) codes. This paper...
Reliability information derived from the channel output in the form of a Log Likelihood Ratio or a Distance Metric (DM) have been proposed in literature for M-ary Quadrature Amplitude Modulation systems. Reliable soft information from the channel output improves the performance of the forward error correction decoding algorithm. This paper proposes an improved method of extracting reliability information...
Data reliability is a significant issue in large-scale storage systems. Erasure codes provide high data reliability via data recovery, which however generates a large amount of data transmission in the network. The bandwidth cost of transmitting the recovery needed data significantly impacts the performance of the located cluster. Existing work considers the single-failure as the most common failure...
A block turbo equalization algorithm is proposed, which is generalized from Data Directed Estimation (DDE) widely used in HF communications. The convergence rate of our block turbo equalization algorithm is faster than that of the linear MMSE turbo equalizations. Two simplified schemes of this block turbo equalization algorithm are also introduced, which is LC-TDDE algorithm and BSIC algorithm respectively...
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