The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Package-board co-design plays a crucial role in determining the performance of high-speed systems. Although there exist several commercial solutions for electromagnetic analysis and verification, lack of Computer Aided Design (CAD) tools for SI aware design and synthesis lead to longer design cycles and non-optimal package-board interconnect geometries. In this work, the functional similarities between...
This paper analyzes Through-Silicon-Via (TSV)-to-device coupling due to the mechanical stress and the electrical field using three dimensional process and device simulation. The analysis considering 40nm and 28nm transistor demonstrates that TSV only has a minor impact on the current of short-channel devices and the effect diminishes with technology scaling.
The Characterization of stacked TSVs is difficult because of expensive experiments and low feasibility. In addition, the calibration of transmission lines connecting TSVs and coupling among TSVs is the main obstacle when horizontally connected TSVs are measured. Therefore, the equivalent transmission matrix of the coupling effect between two adjacent TSVs is derived, and a set of test structures is...
In this paper, a two-pair common-mode filter is proposed to solve the crosstalk and mode conversion problem of conventional ones in multi-pair form, such as USB3.0 and PCIExpress II. Coupling of the two differential pairs is obviously reduced by a shielding ground plane between them. Moreover, mode conversion problem resulted from asymmetry is also solved. Some simulations have been done to prove...
The accurate solution of 3D full-wave Method of Moments (MoM) on an arbitrary mesh of a package-board structure does not guarantee accuracy, since the discretizations may not be fine enough to capture rapid spatial changes in the solution variable. At the same time, uniform over-meshing on the entire structure generates large number of solution variables and therefore requires an unnecessarily large...
As the demand for low-cost electronic systems increases, reducing printed circuit board (PCB) layer count becomes highly desirable. But layer count reduction often limits the PCB routing layer options of high-speed input/output (I/O) signals, making it more difficult to meet the next-generation product's performance targets. For example, using densely wired microstrip routing on a PCB helps reduce...
Power supply noise induced jitter (PSIJ) is one of the critical bottlenecks for I/O signal performance. Good power distribution network (PDN) is a must for high-end system designs. Due to design limitation in die and package, providing sufficient on-die capacitor (ODC) or on-package capacitor (OPD) is a very challenging task. This paper presents a novel on-die decoupling scheme which places decoupling...
Random jitter (RJ) estimation based on Tail Fit algorithm are generally inaccurate in presence of deterministic components like the presence of sinusoidal jitter (SJ) and duty cycle distortion (DCD). Addition of deterministic jitter changes the standard deviation of the tail region of resulting jitter probability density function. A new methodology for random jitter estimation in presence of sinusoidal...
A single-pole single-throw switch constituting the transparent path in a reconfigurable switch matrix is presented, improving the availability of the switch matrix in case of an on-board power-fail. The design of the switch is based on the traveling-wave concept using packaged PIN-diodes on a thick-film ceramic substrate under the constraints on the number of PIN-diodes and power dissipation. The...
This paper describes a simple, yet efficient supply-induced jitter modeling methodology for high-speed I/O circuits. The proposed model uses the average supply noise and a linear factor derived from Spice simulations to estimate the jitter for a circuit block. For circuits with bias voltages, the transfer function of the biasing network is included. The model is implemented in Simulink and closely...
This paper introduces statistical analysis of high-speed nonlinear links by extending the peak distortion analysis to include the impact of nonlinear drivers. By taking advantage of the unique characteristics of interconnect networks, the multilinear theory is applied to calculate the responses of the nonlinear networks by analyzing a series of linear networks. First, the Volterra functional series...
A multi-resolution scheme is proposed to efficiently handle the S parameter with rapid change at low frequency in time domain simulation. It is demonstrated by numerical results that, with the aid of the proposed scheme, the accuracy of time domain simulation based on aforementioned S parameter can be significantly improved without substantial increase of computation costs.
A Parametric macromodeling algorithm based on standard Loewner Matrix (LM) method was introduced recently for generating parametric time-domain macromodels based on S-parameter data. The method was shown to be efficient and accurate for systems with large number of ports and poles. However, the method is not suitable for the parametric problems where the parameter has a direct impact on the order...
This paper presents a front-end module (FEM) for Wireless Personal Area Network (WPAN). This module is composed of a switch IC for Tx/Rx, a Tx Balun, and Rx bandpass filter (BPF). These components are embedded in molding package by employing the proposed package technology. Molding package process is to add lamination and pattern in contrast to normal package of ICs. This process, therefore, has advantage...
Probing solution is crucial for the designs and validation of high-speed PoP devices in high-performance mobile application processor (AP) development, where PoP assembly technology is used to achieve high data throughput & low cost. The paper has developed robust PoP probing solution for AP product development based on microwave network theory, including probe loading effect minimization, probing...
Three dimensional chips stacked using Through Silicon Via (TSV) technology has been under consideration and the subject of intensive research for several years now. Soon the technologies will become available through standard fabs. Will the technology be an instant hit, a niche, or a flop? What is needed to ensure it reaches hit status? What are the basic manufacturing steps and flows? This tutorial...
NanoCarbons constitute the low-dimensional allotropes of carbon including 1-dimensional carbon nanotubes (CNTs) and 2-dimensional (2D) graphene. These nanomaterials have extraordinary physical properties that can be exploited to bring forward their exciting prospects for a variety of applications. This tutorial will highlight and discuss the unique prospects of NanoCarbon materials (especially graphene...
In the past decade rack-to-rack cables in the worlds largest computers have gone from being all electrical to all optical. The optimal strategy for tomorrow's supercomputers will be to exploit those technologies, such as optics, which continue to evolve. Several factors drive the spread of optics within the supercomputer. First, the supercomputer's network doesn't scale well, meaning that for constant...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.