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Reduction of leakage current is a grand challenge in logic and analog devices from viewpoints of low power consumption, high resolution, low noise, and so on. As for the P-N junction leakage current, it is reported that the leakage current is caused by several factors such as junction depth [1], shallow trench isolation (STI) stress [2], metal contamination, and crystal defects [3]. In this paper,...
This paper presents a new CMOS inverter (CGTFET), which is composed of a Gated control IIP for load transistor (Gated-IIP) and a tunneling field effect transistor (TFET) for driven transistor. Based on the measurement data of Gated-IIP and TFET devices published, we have for the first time drawn the load lines and the quiescent point line (Q line) of the new designed CGTFET compared with the conventional...
Enhancement of transistor drivability with suppressing short channel effect is a mandatory requirement for device scaling. In order to address the requirement, transistor structure transition from 2D bulk planar to SOI or 3D FinFET structures is now proceeding[1-3]. In FinFET structures, high dose tilt implantations are used in source drain extension formation. This implantations cause amorphization...
Effects of microwave (MWA) at ≈500 C and rapid-thermal annealing at 600 to 1000 C are compared for phosphorous-doped, strained Si(100) and (110) implanted with molecular Carbon (C7H7) ions. Substitutional Carbon levels at 1.44% were achieved for P-doped, C7 implanted strained nMOS S/D type junctions with MWA.
Silicon carbide (SiC) is a promising semiconductor for high-power devices due to its superior material properties; high breakdown field, high electron saturation velocity, and high thermal conductivity. To implement SiC power devices, pn junction must be formed in the SiC. However, ion implantation for impurity doping has several problems for the SiC. For example, while a high-temperature (∼1700 °C)...
Ultra-violet (UV) Raman and multiwavelength photoluminescence (PL) characterization techniques are examined as potential in-line, non-contact dopant activation and diffusion process monitoring techniques for ion implanted silicon in implant activation process steps. Excellent correlations among sheet resistance (Rs), B depth profiles, UV Raman and multiwavelength PL characterization results were achieved...
Localized Ge and SiGe high mobility channel material is needed for 10nm node and beyond CMOS technology. Thin direct >50% SiGe selective epi followed by oxidation for Ge condensation, 100% Ge selective epi or thermal mixing are methods that require a hard mask and epi interface defects with rough surfaces are always an issue. An alternative approach to epi is using photoresist masking as proposed...
The role of power electronics and power devices in addressing the challenges in power and energy conversions and storage have continuously been very important and have been given wide attention also due to the fact that energy issues arising from climate change has risen to be a crucial global issue. In power electronic applications, the power density factor related to system designs has improved...
Plasma processes have long been used in various stages of semiconductor device fabrication. Plasma enhanced chemical vapor deposition (PECVD) has been widely used as a low temperature silicon dioxide film deposition method in the semiconductor industry. [1,2] Various modes of plasma etching techniques also have been playing major roles in the silicon industry. Physical vapor deposition (PVD or sputtering),...
Ion implantation is doping process for manufacturing semiconductor. Doping process contains not only implanting doping atoms at a controlled depth profile but also making damages caused by collisions between ions and silicon crystal atoms, knock-on silicon atoms and silicon crystal atoms. A characteristic of doping atoms such as boron, phosphorous and arsenic is well known because it is easy to measure...
This work investigates the formation of arsenic segregated Ytterbium and Nickel silicide using low-temperature microwave annealing. Two types of dopant segregation approaches, implant-before-silicidation and implantation-through-metal, are performed to examine the electrical properties of the microwave annealed silicide. Results of current-voltage curves and dopant distribution profiles are compared...
Ideal source and drain regions rely on high dopant solubility in the crystalline substrate, in order to boost activation and reduce sheet resistance, and low dopant diffusivity, to facilitate device scaling. High-concentration doping of Ge can be quite a substantial problem, as it is difficult to activate impurity atoms to a high enough level, prevent them escaping during thermal treatments, while...
Microwave annealing was used for the activation of both n-and p-type ultra-shallow junctions, formed by pre-amorphization Ge implant followed by low energy n-and p-type dopant implant. The regrowth of a-Si layer was completed after 50 seconds microwave annealing. However, the EOR defects were still clearly visible even after 1200 seconds annealing. The maximum fraction of hall electrical activation...
Continuous transistor scaling brings new challenges and opportunities to the semiconductor industry [1, 2]. One of the key challenges of producing advanced CMOS devices is the junction optimization, which is essential to minimize the device's parasitic resistance. Abrupt and ultra-shallow junctions (USJ) with high dopant activation and low junction leakage are required to meet device scaling requirements...
Ion implantation with medium current implants has been applied for halo implantation. Indium (In) has been used for halo implantation for suppression of short channel effect [1]. Recently, the advantage of cryogenic ion implantation with medium current implanters has been reported [2]. They showed that the cryogenic BF2 implant improved the short channel rolloff characteristics.
Strain technology is commonly considered as an effective means of enhancing metal-oxide-semiconductor field-effect transistors (MOSFETs) performance. It has been widely used since the 90nm technology node [1]. Traditionally, the benefit of strain is known to be due to the strain induced carriers mobility enhancement [2], which intrinsically comes from the piezoresisitance effect [3]. In the literatures,...
Atomistic Kinetic Monte Carlo (KMC) diffusion modeling is used for dopant diffusion and defect analysis in ultra shallow junction formation in Si and SiGe. An analysis of dopant diffusion and defects in SiGe-channel Quantum Well (QW) using an atomistic KMC approach are shown. Thin SiGe layer with high Ge content for SiGe-channel QW has an impact on implantation damage and Boron-Transient Enhanced...
In PureB technology, a layer of pure boron is deposited on Si using a commercial single-wafer Si/SiGe epitaxial CVD reactor, forming ideal nm-deep ultrashallow junctions with low saturation currents [1]. As another attractive feature, the PureB layer itself has proven to be a robust front-entrance window for photodiode detectors for low penetration-depth beams such as DUV [2], VUV [2] and EUV [3]...
Progress of silicon transistors will be described on junction technologies. Especially, advanced CMOS device and more than Moore technologies will be discussed for various applications.
Extension doping for FinFETs is more difficult compared with planar devices due to fin geometry. An amorphization problem for NMOS FinFETs1–3 and photo resist shadowing for CMOS FinFETs4 are pointed out when standard ion implantation (I/I) is used. Amorphization of the fin results in poor recrystallization during subsequent annealing.1 The whole fin can easily be amorphized when As is implanted at...
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