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This paper presents a design of 0.6 V class-AB voltage follower (VF) using 0.13 µm CMOS technology. The follower is developed based on the super source follower (SSF) using bulk-driven and quasi-floating gate (QFG) techniques. The proposed VF can operate at low voltage without DC level shift between the input and output terminals. The simulation results show the total harmonic of 0.3 % for an input/output...
This paper presents a simulation study of a fixed frequency state trajectory control technique of the buck converter. That technique regulates the turn-on and turn-off trajectory planes of the controlled switch to achieve optimum dynamic and static performance. The circuit model of buck converter taking into account the effect of the output capacitor equivalent series resistance (ESR) is derived....
Ubiquitous network is really one of remarkable trends of next generation information and communication technologies. However, the rapid increase of ubiquitous technologies has given rise to serious concerns about power dissipation and security issues which are getting worse, especially in the case of ad-hoc network because it is resource constrained. The authors have so far developed a ubiquitous...
We propose a new design of most important logical circuits using optical devices for all-optical addition/subtraction applications, in which the simultaneous operation of addition/subtraction arithmetic operation can be performed by using the dark-bright soliton conversion control. In operation, all-optical data input for addition/subtraction of binary operation logic ‘0’ and ‘1’ are formed by dark...
This paper presents low power CMOS full adder cells. The full adder cells are utilization to low power by using XOR and XNOR gate architectures with pass transistor logic and transmission gate. All simulation results have been carried out by using HSPICE program simulator based on 22 nm CMOS technology at 1.2 V supply voltages. The operating frequency is 250 MHz. In comparison with other 1 bit adder...
Nowadays, a wireless mesh network can be inexpensively deployed to provide the Internet access. One key challenge in the deployment is how to maintain high transfer throughput. As the network size grows, the transfer throughput falls rapidly due to MAC interference. Caching has been proposed in previous works to solve this problem. The common caching technique is on-path caching, whereby the caching...
In this paper, the independent rise and fall edge dead time generator for switching control signal is presented. The scheme of the proposed circuit is based on the monostable multivibrator circuit together with the toggle circuit that use JK flip-flop to operate, OR Gate, AND Gate and NOT Gate. The obtained results from simulation and experiment affirm that the dead time at rise and fall edge of switching...
This paper presents a 0.5 V quasi-floating gate self-cascode DTMOS current-mode precision full-wave rectifiers (PFWR). The circuit is designed based on improved Wilson current mirrors. All MOS transistors are biased on the edge of conduction, enabling the circuit to operate at low voltage with low power consumption. Negative feedback mechanism of the Wilson current mirror and cross coupling techniques...
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