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A ring oscillator is designed and implemented on standard 130nm CMOS technology for wide range frequency tuning purpose in a spectrum monitor receiver used in cognitive radio applications. The three-stage differential ring oscillator is tuned by an array of MOS varactors, which is controlled by a novel staggered voltage offset system for improved tuning linearity. The proposed ring oscillator achieves...
An architecture for MDAC stages with low sensitivity to finite opamp gain is proposed, that allows designing high-precision pipeline ADCs in deep submicron technologies. The standard MDAC architecture is modified by inserting a voltage follower in the feedback path, and zero gain error is achieved if a relationship between the gain of the main opamp and of the opamp used in the voltage follower is...
This paper describes a low-power fully differential cyclic ADC. It utilizes a 3-bit C-2C ladder to achieve 9-bit resolution. For the 9-bit resolution the 3-bit C-2C ladder occupies 64 times less area than a binary weighted capacitance array. The operational amplifier with the slew rate detection is used in order to increase the speed of the ADC. The simulated power consumption of the ADC is 33 µW@3...
Power consumption is an important limitation to analog-to-digital converters. The objective of this paper is to estimate a lower bound to the power consumption of successive approximation analog-to-digital converters. This is an extension of our previous work which was limited to pipelined and flash architectures. We find that the power consumption in our case is bounded by capacitor mismatch or thermal...
AM-PM distortion causes spectral regrowth in RF transmitters with modulated signals. One reason for AM-PM is the fact that signal-dependent transistor input capacitance pulls the frequency response of the input matching network and causes phase shift already at the input of the transistor. This paper studies the Miller capacitance effect in most common fixed-supply and supply modulated power amplifier...
This paper proposes a new Built-In Self Test architecture to detect time interval errors (TIE) of Phase-Locked Loops. A transient current sensor utilizing Flipped Voltage Follower (FVF) is used with a comparison block in the proposed topology. It is designed and verified for IBM 65nm technology using 1 V supply voltage and capable of detecting both steady-state and transient currents up to 150 µA...
Current sensing amplifier is one of the basic blocks in biosensing interfaces as current-related phenomena are at the base of biological and chemical interfaces. A wide number of papers have been published in literature on the subject showing both continuous time (CT) and discrete time (DT) approaches. Among them, CT solutions show better performance in terms of input-referred noise floor due to the...
This paper presents a novel approach to design a programmable-bandwidth amplifier intended for ultra-low-power switched-capacitor application. The proposed topology is based on the common load-compensated two-stage OTA. The GBW is enhanced by replicating the second amplifying stage. Implemented in a 65-nm CMOS technology and approved by the post-layout simulation, the GBW is programmed in three operation...
Very low frequency Gm-C filters are critical cells that should be carefully designed in order to avoid an excessive occupation of silicon area, especially when a high dynamic range is required. In this work we propose a routine, which exploits the MATLAB Optimization Toolbox in order to perform an optimum sizing of low frequency Gm-C integrators. The target is minimizing the integrator area, while...
Existing works on generating random bits by ring oscillators (ROs) mostly do not have detailed analysis on phase noise and jitter which are the entropy source of a random number generator. This paper analyzes the suitability of existing ROs for random number generation and possible improvements in order to increase the randomness of a RO. Randomness equations are derived, to understand efficiency...
This paper presents an improved PMOS-based active inductor circuit suitable for output driver in wireline link transmitters. Wider tuning range and higher inductive impedance in the desired bandwidth with respect to a previous reported topology is achieved using a varactor in the active inductor architecture and modifying the feedback resistor. Using the proposed active inductor, a prototype output...
This paper compares one- and two stage operational transconductance amplifiers (OTAs) to be used in an 8-bit high speed (440-MS/s) deep submicron CMOS (130nm) low voltage (1.2V) pipelined Analogue to Digital Converter (ADC) based on an 1.5-bit double sampling Multiplying Digital to Analogue Converter (MDAC). The main emphasis is put on the OTA DC-gain, gain-bandwidth (GBW), differential linear output...
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