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We have investigated electromigration process at metal nanojunctions as small as several tens of atoms and found that the elementary process of electromigration in such nanojunctions is the self-diffusion of metal atoms driven by microscopic kinetic energy transfer from single conduction electrons to single metal atoms. We have also shown that metal nanojunctions are stable and can support extremely...
We investigated a pulse-time-modulated neutral-beam-enhanced CVD at a low substrate temperature of -70°C with dimethoxy-tetramethyl-disiloxane to form low-k SiOCH film. This method provided an ultimate low-k SiOCH film with a k-value of 1.3, a sufficient modulus of more than 5 GPa, and ultra-high thermal stability (no desorption of CH3 and H2O by 400°C annealing). This result is explained by the extremely...
Superfill (bottom-up) phenomena relevant for Damascene processing typically rely on the time-dependent interplay of various organic and inorganic additives with both the metallic copper surface and with cuprous ions as intermediates of the copper electro-reduction in the near-surface regime. In-situ STM, in-situ SXRD (Surface X-Ray Diffraction) measurements combined with DFT calculations provide new...
Low cost and low temperature fabrication process is required for TSV. In this study, we propose a low temperature deposition of barrier and copper seed layers by wet process only using electroless plating. Moreover, we use AuNPs as a catalyst which is densely adsorbed on SiO2 sidewall of TSV with SAM. We succeeded in conformal deposition of barrier and seed layers, and this method is effective for...
A highly robust gap-fill process technology of spin-on glass (SOG) was developed for the interlayer dielectric (ILD) in sub-30 nm devices. We revealed that the filling behavior of SOG within gaps during spin-coating is mainly dependent on the capillary effect. The highly wettable surface treatment prior to SOG coating was found to enhance the gap-fill performance remarkably. This technique plays a...
A trade-off property of CuSiN between EM improvement and line resistance increase was resolved by a breakthrough that leaves oxygen at grain boundary of Cu line surface before CuSiN formation. Then, the combination of CuSiN and Ti-rich TiN (Ti(N)) barrier metal (-BM) was applied. Oxygen left by weakening process strength of CuOx reduction lowered line resistance, because Si diffusion causing line...
Impacts of k-value reduction on LSI performances are clarified quantitatively using 2M-gate net-list. Reduction in k-value from 3.0 to 2.5 for M2-M5 interconnect layers achieves 11%-drop in interconnect parasitic capacitance (Cint) and 8.4%-reduction in propagation delay (τd), which also shrinks the effective variability of τd to improve LSI operation margins. From a viewpoint of BEOL fabrication...
A 40% reduction in W-contact resistance compared to the 45-nm node process has been achieved by using both ALD-TiN treated with N2 remote plasma and B2H6-reduced W-nucleation, and thus the resistance of a 32-nm node W-contact could be kept the same as that of the 45-nm node process despite the 70% shrinkage in the contact diameter. To further shrink devices, low-resistivity CVD-W film was fabricated...
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