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Amplifiers operating at very high frequencies up to the gigahertz range are presented. Processed in an experimental 1.0 ??m n-well CMOS-technology the proposed circuits combine precise definition of amplification by a ratio of transconductances with a new method of d.c.?? decoupling and 50?? output drive capability. Analyzing the high frequency and analog behavior of scaled MOS transistors some hints...
A two-stage op-amp with a novel output driver achieves 5.8MHz GBW, 68?? phase margin, delivers 2.6Vpp with a THD of 0.14% and 3.2Vpp with THD of 0.38% into 100?? at 20kHz. The novel output driver enables a very simple circuit measuring only 0.11mm2.
This paper presents a novel VLSI approach for combustion engine control. The approach is based on a real time solution of a thermodynamical differential equation. The control system calculates an optimum ignition point by fast measurement and real time processing of signals as temperature, pressure and volume of the combustion chamber. The required computational power cannot be met with standard signal...
A fourth order monolithic ΣΔ converter is presented. The circuit avoids problems associated with switched capacitor samplers by using a completely continuous-time noise shaper. Integrated passive components are used, with a self-tuning circuit to make negligible the associated uncertainty in the time constants, which is a serious problem in such a high order design. The circuit is unconditionally...
This paper presents a new multifunction voltage regulator specially designed for use in adverse automotive environment. A mixed technology has been utilized to exploit the flexibility and the advantages coming from the combination of bipolar and MOS components. The device includes four 5V low dropout tracking regulators, one is able to supply current in excess of 600mA, for the ??P, two are tracked...
A capacitive torque sensor has been developed in which a twist angle in an axle between two angular displacement sensors spaced 10 cm apart results in a phase modulation of an excitation voltage. A bipolar readout circuit has been designed for the readout of this sensor. An important restriction for the design is that the phase error introduced by the circuit must be as small as possible. The static...
This paper describes a novel high-speed CMOS directly driven transmission circuit system using twisted pair cables for B-ISDN applications. Low swing 0.3V differential signal levels are introduced to realize a 320 Mb/s data transmission. The transmitter and receiver circuits are placed in the area of a 0.8 ??m CMOS gate array I/O circuit.
In order to compare current and logic testing of a static memory cell in the presence of bridging defects, an electrical model for the defective cell is used. The SPICE parameters for the cell have been extracted from the layout and process information. All the extracted bridges are shown to be quiescent current testable. However, for a large percentage of the defects, the logic (voltage) testability...
This paper presents a new multiplying DAC based on sigma delta modulation. The new approach has the advantages that; its linearity is not dependent on element matching and it is simple. The equations which are necessary for performance estimation are derived. Measurements on both a volume control application and a modulator for tone detection verify the feasibility of this new approach.
The paper describes a 0.7??m CMOS switch circuit of 350k-transistors, designed for use in a fully autonomous 16??16 Switching Matrix devoted to telecommunications, capable of switching ATM multiplexes of 1.244 Gb/s. The chip processes 4-bit slices of each incoming multiplex. Seven chips working in parallel are enough to achieve standard ATM cells switching.
Despite the gradual decline of NMOS as a mainstream integrated circuits technology, its submicron versions remain competitive for applications that require an operating speed beyond the capabilities of CMOS, a power dissipation below that attainable with silicon bipolar or III-V high-speed technologies, and a fabrication price lower than possible with BiCMOS. A class of such applications is defined...
Many computer vision tasks requiring only a limited resolution and using a simple image processing algorithm could be implemented on a single silicon chip. This article presents a smart sensor chip, comprising a grid of light sensors and a set of processors operating in parallel. The chip has been fabricated in standard CMOS technology and satisfactorily tested. The main characteristics of the chip...
A new floating point macro cell library, suitable for logic synthesis of image signal processor, has been developed. A floating point Arithmetic Logic Unit(ALU), a floating point multiplier(MPY), an instruction RAM and a data register file are included in the library. The ALU and MPY can support not only IEEE754 floating point operations, but also fixed point operations and logical operations which...
The development of a custom CMOS LSI circuit is described as a part of a telemetric device providing means of studying the relation between animal stress and body temperature on an automatic basis. The read only device is injectable and is capable of transponding on a close range information on both identity and temperature. The integrated circuit consists of two main parts. One part is a custom designed...
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