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The problem of designing asynchronous circuits where the changes in binary input signals occur independently of one another is discussed. If several input changes occur within some interval δ1, the circuit behaves as though the changes were simultaneous. If consecutive changes are spaced by intervals exceeding some longer interval δ2 then the circuit reacts as though a sequence of single changes had...
A new flow table for describing normal-fundamental-mode (NFM) asynchronous machines, the ADSE table, is introduced. Although the structure of this table has several ramifications in the area of circuit realization, this paper emphasizes its utility in generating checking experiments for NFM asynchronous machines. Using the ADSE table, a procedure is presented that allows existing (or future) methods...
The simultaneous use of delayed and undelayed versions of the internal variables permits the realization of normal fundamental mode circuits with less restricted state assignments than the usual single transition time state assignments. This paper is concerned with problems associated with these state assignments.
We consider a class of straight line programs admitting structured variables. It is easy to associate with each program a set of expressions which reflects the natural meaning of a structured variable such as an array. However, the question of whether two such expressions are equivalent depends on what is assumed about the possible initial values of the variables and what algebraic laws are assumed...
This paper deals with hazards on out-puts of combinational switching circuits for multiple input changes. Certain types of function hazards are defined and are shown to be impossible to eliminate with any logic realization. Also, an interrelation between static and dynamic function hazards is established. Hazards due to delays in the logic are defined and a method of elimination is given for both...
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