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Unique analog product application requirements such as high speed, low noise, low power, high precision and high voltage demand complex analog process technologies. This complexity poses several reliability challenges that are specific to each technology. In this paper some of the key reliability mechanisms in most common analog process technologies are highlighted. To meet broad range of analog IC...
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CMOS chips are scaled to smaller geometries, the interconnects play an increasing role in the overall chip performance. This paper presents an integrated process for yield enhancement strategy to overcome a so-called "cosmetic defects" in 130- and 90-nm complementary metal-oxide-semiconductor (CMOS) process node.
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We have examined the post-BD currents in high-k/metal gate MOSFETs with the Si substrate under depletion and accumulation conditions. The experimental results seem to point out that the electronic properties of the substrate region close to the entrance of the BD spot play a central role in the description of the phenomenon. We have also examined the behavior of the post-BD current in terms of the...
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This investigation considers in detail a defect called "silicon substrate damaged defects" and also introduces these defects' forming mechanisms and their root causes. These defects are likely to become increasing important in the future of deep-sub micrometer ULSI's situation. Two conditions typically result in silicon damaged defects during manufacturing processes namely: (1) watermark...
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Multi-frequency transconductance technique is successfully applied in this work for the first time for interface characterization of OFETs. Standard charge pumping measurements are used on silicon MOSFETs for the validation of MFT technique. The method is implemented on pentacene as well as the P3HT based OFETs with SiO2 as the gate dielectric. Our results show interface state densities in the range...
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The novelty of this work lies in using the E&M algorithm for analyzing multi-censored mixture distribution EM data. Furthermore, the Akaike Information Criterion (AIC) will be used to determine the number of failure mechanisms in a given set of failure data and the Bayes' posterior probability theory is applied to determine the probability of each failure data belonging to the different failure...
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A near-infrared continuous wavelength, in-lens spectroscopic photon emission microscope has been developed. The dispersive element is a three-element prism which has been specially designed to disperse light from 0.9 mum to 1.6 mum about the optical axis. The system has been used to perform frontside and backside spectroscopy on forward and reverse-biased p-n junctions and saturated nMOSFETs. The...
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The transient-induced latchup (TLU) in CMOS ICs under electrical fast transient (EFT) test has been investigated by experimental verification. With positive and negative voltage pulses under EFT test, the TLU can be triggered on in CMOS ICs with the parasitic pnpn structure. The physical mechanism of TLU in CMOS ICs has been developed with experimental verification in time domain. All the experimental...
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In this study, the enhancement of pi-FET performance using optimized parameters is designed to investigate the electrical characteristics as a function of the BOI length (LBOI) under the body region. Additionally, the SOI devices (FDSOI-FET and UTBSOI-FET) are also designed for the comparison with the pi-FET by using ISE TCAD tools.
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The current trends in electronics are towards high frequency signal operation, higher interconnects density and continuous reliability improvement interconnects. In order to characterize reliability, accelerated reliability tests are applied to evaluate lifetime and to determine acceptable reliability levels. Based on this fact, the definition of failure criteria is fundamental to ensure repeatability...
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As DRAM and NAND cells are rapidly scaled deep into the nanoscale regime, meeting design and reliability requirements require deeper understanding of single-cell characteristics. Some of the challenges are common between these technologies while some are unique. New materials and cell structures are being introduced to address some of these issues and provide further scaling opportunities.
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Today, we report only one paper concerning this issue and we believe that it deserves to go deeper in detail concerning the physic of failure related to ESD stresses. The second part of this paper is devoted to the reliability investigation of AIN-based capacitive switches under ESD stresses.
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Heat generation in carbon nanofibers (CNF) has raised concerns regarding reliability in these structures under high- current conditions. This work addresses the interplay between electron transport and resulting Joule heating in CNFs. The model relates current to power dissipation leading to temperature rise in the structure, thus elucidating the relationship between thermal and electrical properties...
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In this paper, increased EOS/ESD concerns related to MEMS structural specificities are indexed and general works about failures and reliability improvement in MEMS are reviewed from an EOS/ESD point of view, as well as existing protection methods. Then a new method is proposed and recommandations for a general scheme for MEMS protection are suggested.
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Several microsystem applications require hermetic or semi- hermetic packages. It is for this reason mandatory to be able to check the hermeticity of these packages. The standard tests, using gross leak and fine leak, work very well for large cavities, but might give erroneous results for small cavities as typically used for MEMS. We discussed different alternative test methods.
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The effect of charge displacement in nitride layer of ONO stack in scaled flash cells are experimentally studied by using gate stress measurements. The redistribution of charge is found to follow Poole-Frenkel conduction mechanisms. However, the measurements on scaled devices show significant random telegraph noise. The noise will be even more pronounced in future scaled devices.
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The failure mechanism related to Kirkendall voids is a consequence of the intermetallic thickness growth (Au- Al). It impacts the wires bonding reliability at high temperature. Temperature accelerates the intermetallic thickness growth as the diffusion between gold and aluminium is accelerated. Moreover, the role of the package geometry was identified, and experimental results were confirmed by both...
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Nanoprobing plays a crucial role for failure analysis (FA) in the nanometer-region generation nodes by having the capability to detect the failure sites and characterize the electrical behaviour of malfunctional devices for better understanding of the failure mechanisms. It also offers a guide to the necessary physical analysis in identifying the cause of failure. This established electrical failure...
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In this paper we describe a structure designed and fabricated for the purpose of locating successive SBD's in 2D. It is shown that the original BD location method can be readily extended to 2D, for both accumulation (Degraeve et al., 2001) and inversion (Crupi et al., 2005). It is concluded that the locations of two successive SBD's can be readily distinguished and that subsequent SBD events do not...
