This paper presents the design, trade-off of a very high bandwidth variable gain stage, and the practical limits during its implementation as a tunable gain cell in the high speed equalizer for next generation serial electrical / optical communication links. The variable gain stage presented in this work, achieves a bandwidth of above 50 GHz and a tunable gain range of 40 dB. With a very high input and output impedance, it could be used in the equalizer with the input data streams up to 80 Gb/s. The variable gain stage is designed in an 130 nm SiGe BiCMOS technology, with an active area of 0.04 mm2 and a power consumption of 30 mW from a 2.5 V supply.