This paper covers the design of a complementary metal oxide semiconductor (CMOS) pixel readout circuit with a built-in frequency conversion feature. A single pixel was designed containing all of the signal-to-frequency conversion circuitry, after which an array of 64 pixels was designed. The on-chip frequency modulation technique is preferred over analog-to-digital conversion (ADC) techniques due to its smaller size and the possibility of a higher dynamic range. Considerations are made regarding the size of the components, as various characteristics of CMOS devices are limited by decreasing the scale of the components [1]. All components of the pixel are designed from first principles to meet the requirements of a small pixel size of 30 × 30 square micrometers and an output resolution greater than that of an 8-bit ADC. The photodetector is realized by an n+-p+/p-substrate diode with a parasitic capacitance of 3.3 fF. The analog front-end was designed around a Schmitt-trigger circuit. The photo current is integrated on an integration capacitor of 200 fF. The circuit schematic and layout were designed using Cadence Virtuoso and the process used was the ams CMOS 350 nm process. The results were confirmed to comply with the required size and resolution specifications and the layout passed all verification checks. The dynamic range achieved was 58.828 dB with an output frequency range between 12.341 kHz and 10.783 MHz. It was also found that the output frequency in this range has a linear relationship to the photocurrent generated by the photodiode.