This paper proposes a wire-bonded design with a unique double-end sourced structure for multi-chip paralleled SiC power modules. The proposed design achieved a reduced power-loop inductance of 7.2 nH, while inheriting the advantages of the conventional wire-bond technology. More importantly, the symmetrical structure of the proposed design brought consistent performances to the paralleled devices. A 1200 V, 60 A SiC MOSFET half-bridge module (3 devices in parallel) was fabricated and tested for verification. It demonstrated suppressed voltage overshoot and improved current-sharing among the devices. In addition, the proposed layout exhibited lower radiation noises, which will cause less interference to the sensitive electronic devices. A converter level design is also presented to accommodate this unique module structure.