A novel digital imaging system using silicon-photomultiplier (SiPM) sensors is currently under development at DESY, Hamburg, for applications in high energy physics and photon science. The system is a hybrid based on a thinned SiPM-sensor chip from MPG-HLL, Munich. The final readout chip will comprise a 32-by-32 pixel matrix with 50-μm pitch and will be realized in IBMs 130-nm CMOS technology. It provides active quenching and recharging, fast and combinatorial trigger, time-to-digital converter, and fast readout of the pixel pattern at MHz-frame rates. A first prototype ASIC with 16-by-16 pixel matrix was designed including corresponding pixel electronics, fast trigger and single-row combinatorial trigger. Measurements on two samples of prototype ASIC give information about timing requirements. A TDC-bin width of ≤90 ps and a veto-time window of eight clock cycles are demanded. The maximal power consumption amounts to 15 μW per pixel at 1.2-V and 4 μW per pixel at 3.3-V supply voltage.