There are two main families of charge pumps: parallel and stacking. In this paper, we propose to compare a design that is a combination of both with the more common parallel structure. Its main advantage is to make use of only low voltage capacitors as, for a stacking architecture but without its drawback. The hereafter detailed model shows that with the same capacitors the proposed structure would be less efficient. However this handicap is counterbalanced by the fact that low voltage capacitors have a better sheet capacitance. It is demonstrated that the silicon area of the proposed structure is smaller, up to three stages included, compared to a parallel type of charge pump with ideal switches.