[EPTC2012 p319.doc] Bond pads in IC technologies having aluminum-based metallization (Al) and silicon dioxide dielectric (Si02) are studied in relation to stresses from unit probe and wirebond, with emphasis on bond pads with thin pad Al. Finite element simulations attempt to replicate bond pad experimental data previously disclosed by ON Semiconductor. The simulations predict bond pad internal stress locations and magnitudes, providing more understanding of why one bond pad cracks and another doesn't. Implications for bond pad design and copper (Cu) wirebond on circuit under pad (CUP) are discussed.