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A 6F2 single cell (one-cell-per-bit) operation of the floating body RAM (FBRAM) is successfully demonstrated for the first time with more than 60% yield of 16Mbit area in a wafer. The signal sense margin (SSM) at actual read conditions is found to well back up the functional results. The parasitic resistance in the source and drain formed under the FBC's spacers can be optimized for making the SSM as large as 8muA at plusmn 4.5sigma without sacrificing the retention time.