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A gate structure design for negative capacitance field effect transistors (NCFETs) is proposed. The hysteresis loop in current–voltage performances is eliminated by the nonlinear C–V dependence of polysilicon in the gate dielectrics. Design considerations and optimizations to achieve the low SS and hysteresis-free transfer were elaborated. The effects of gate-to-source/drain overlap, channel length...
The implementation and operation of the nonvolatile ferroelectric memory (NVM) tunnel field effect transistors with silicon-doped HfO2 is proposed and theoretically examined for the first time, showing that ferroelectric nonvolatile tunnel field effect transistor (Fe-TFET) can operate as ultra-low power nonvolatile memory even in aggressively scaled dimensions. A Fe-TFET analytical model is derived...
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