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This paper presents an analog VLSI processor chip with application in a high-speed binocular stereo vision system used for the recovery of scene depth. We have attempted to exploit the principal advantages of analog VLSI - small area, high speed, and low power - while minimizing the effects of its traditional disadvantages - limited accuracy, inflexibility, and lack of storage capacity. A CCD/CMOS...
The authors describe a 200-MHz PLL (phase-locked loop) in a 2- mu m CMOS technology employing an untrimmed current-controlled ring oscillator (CCO). Two phase detectors are included: a phase-frequency detector (PFD) for fast acquisition during data preamble (100% pulse density), and a mixer phase detector to lock on actual data (in the presence of missing pulses). Simulation results and experimental...
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