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A prototype of a mixed-mode ASIC composed of a fast readout architecture that interfaces with a matrix of 4096 Monolithic Active Pixel Sensor (MAPS) was fabricated via STM 130nm CMOS technology. Groups of 4×4 pixels form a macro-pixel (MP). The readout architecture is parallel and could overcome the readout speed limit of big matrices. As the output port can only accept one-hit information at a time,...
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