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We propose a Sub-threshold (Sub-) Self-Adaptive Scaling (SSAVS) system for a Wireless Sensor Network with the objective of lowest possible power dissipation for the prevailing throughput and circuit conditions, yet high robustness and with minimal overheads. The effort to achieve the lowest possible power operation is by means of adjusting to the minimum voltage (within...
Self-Adaptive VDD Scaling (SAVS) technique achieves power/energy reduction by dynamically scaling VDD for the prevailing conditions. However, when applied in sub-threshold (sub-Vt) region, robustness issues need to be addressed due to the severe delay uncertainty associated with sub-Vt Process, Voltage, and Temperature (PVT) variations. To ensure robustness for sub-Vt SAVS, we adopt the asynchronous-logic...
Digital Sub-threshold circuits are highly susceptible to large delay variations due to Process, Voltage and Temperature (PVT) variations, hence compromising their operation robustness. In this paper, we propose and analytically derive the delay variation models of digital sub-threshold circuits with PVT variations, and verify the models through computer simulations (@ 130nm CMOS BSIM4 HSPICE model)...
In this paper, a fine-grained power gating technique for an asynchronous-logic pipeline stage is proposed using locally controlled gating transistors. The proposed power gating technique is implemented with minimal control overheads (one additional inverter per pipeline stage for driving PMOS Gating) and delay overheads (within 15% more than the conventional asynchronous-logic pipeline stage). Different...
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