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Phase-locked loops (PLLs) play a key role in electronic systems used in high energy physics experiments. They are often used as jitter cleaners or as a building blocks of high-speed serial transceivers deployed in trigger and data acquisition systems. A PLL includes analog sub-components and it generally requires to be implemented as a full custom block in an integrated circuit (IC). A technology...
Embedded Delay Locked Loops (DLLs) and Phase Locked Loops (PLLs) are available as hard-macros in the latest Field Programmable Gate Arrays. The main features offered by DLLs and PLLs are clock phase de-skewing, frequency synthesis (multiplication or division) and jitter filtering. The clock signal at the output of a DLL or a PLL has a phase noise (or jitter), which has to be taken into account in...
The Fast Control and Timing distribution System (FCTS) of a High Energy Physics experiment must distribute the clock with minimum jitter and it must transfer data with a fixed latency. In fact, transferred data include trigger signals (accept/reject and qualifiers) and fast control commands, whose timing must be preserved. Latest Field Programmable Gate Arrays (FPGAs) offer embedded high-speed Serializers-Deserializers...
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