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A new concept of the structure design with an alignment between the maximum band-to-band tunneling rate and electric field has been proposed to enhance the performance of TFETs. It was found that the specific gate of TFET to form an obtuse shape can dramatically improve the on-current of TFET, with over 4 order improvement in comparison to planar ones. This complementary TFET (CTFET) was also demonstrated...
This paper studies how boron thermal diffusion in SiGe heterostructure are influenced by different source drain extension high-energy fluorine implant after SiGe thermal process for advanced HKMG SRAM device. Different fluorine profiles may introduce different fluorine concentration along Si/SiGe interface and result in fluorine interstitial cluster at different SiGe positions after SiGe 700°C thermal...
This paper presents a state-of-the-art 28nm CMOS technology using conventional poly gate and SiON gate dielectric (Poly/SiON) with best-in-the-class transistor performance, SRAM SNM (static noise margin), MOM capacitance density and mismatch, and ULK (k=2.5) interconnect. The ION are 683 and 503 uA/um (at IOFF = 1nA/um, VDD=1V) for the n- and p-MOSFET, respectively. (With normalized tOX and VDD, these...
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