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CMOS-compatible 100 V / 650 V enhancement-mode high electron mobility transistors (E-HEMTs) and 650 V depletion-mode MISFET (D-MISFET) are fabricated on 6-inch GaN-on-Si wafers. These devices show excellent power converter switching performances. Both 100 V and 650 V E-HEMTs had passed industrial reliability qualifications. The importance of bulk leakage, interface quality and gate trapping in dynamic...
A new concept of the structure design with an alignment between the maximum band-to-band tunneling rate and electric field has been proposed to enhance the performance of TFETs. It was found that the specific gate of TFET to form an obtuse shape can dramatically improve the on-current of TFET, with over 4 order improvement in comparison to planar ones. This complementary TFET (CTFET) was also demonstrated...
CMOS-compatible GaN-on-silicon technology with excellent D-mode MISHFET performance is realized. A low specific contact resistance Rc (0.35 Ω-mm) is achieved by Au-free process. MIS-HFET with a gate-drain distance (LGD) of 15 μm exhibits a large breakdown voltage (BV) (980 V with grounded substrate) and a low specific on-resistance (R ON,sp) (1.45 mΩ-cm2). The importance of epitaxial quality in a...
This study develops improved AlGaAs/InGaAs pseudomorphic high-electron mobility transistor (pHEMT) grown by low-pressure metallorganic chemical vapor deposition (LP-MOCVD). A treatment with ammonium polysulfide (NH4)2SX to passivate the surface of AlGaAs barrier layer is performed. The two-terminal gate-drain breakdown voltage of the passivated pHEMT is as great as 25 V, which represents an improvement...
This paper presents a state-of-the-art 28nm CMOS technology using conventional poly gate and SiON gate dielectric (Poly/SiON) with best-in-the-class transistor performance, SRAM SNM (static noise margin), MOM capacitance density and mismatch, and ULK (k=2.5) interconnect. The ION are 683 and 503 uA/um (at IOFF = 1nA/um, VDD=1V) for the n- and p-MOSFET, respectively. (With normalized tOX and VDD, these...
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