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A novel DRAM cell based on floating gate (FG) concept is investigated. Compared to the conventional two-transistor FG DRAM cells, this new memory cell has a much simpler configuration with only one transistor. Besides, its write speed is improved by introducing an integrated gated diode and state ldquo1rdquo can be self-refreshable. In this paper, the device configuration, the DRAM application feasibility,...
A novel capacitorless DRAM cell with enhanced retention performance is investigated. The write / read mechanisms, speed, retention performance are studied with numerical simulations. Further, the manufacturing method of this device is briefly discussed.
This letter proposes a novel 4.5F2 capacitorless dynamic random access memory cell with a floating gate (FG) connected to drain via a gated p-n junction diode. The FG in the proposed memory device is for charge storage and can electrically be charged or discharged by current flowing through a gated p-n junction diode.
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