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For a 4T pixel-based CMOS image sensors (CIS) readout chain, with column-level amplification and CDS, we show that the input-referred total noise in a standard 65 nm process can be reduced to 0.37 e−rms. Based on transient noise simulation using Eldo, the deep sub-electron noise performance have been reached using only circuit techniques and optimal device choices. The simulation results have been...
A sub-$0.5\,\text {e}^{-}_{\text {rms}}$ temporal read noise VGA (640H${\times }480\text {V}$ ) CMOS image sensor has been integrated in a standard $0.18\,\mu \text {m}~4$ PM CMOS process. The low noise performance is achieved exclusively through circuit optimization without any process refinements. The presented imager relies on a 4T pixel of $6.5\,\mu \text {m}$ pitch with a properly sized...
A sub-sampling RF front end which exploits the intrinsically high quality factor of MEMS devices for performing channel filtering directly at RF is proposed in this work. This narrow band filtering at RF also acts as a good anti-aliasing filter to support down-conversion by sub-sampling. The RF front end employs current reuse for amplification, mixing and filtering. A low phase noise BAW based DCO...
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