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Embedded non-volatile memory (NVM) introduces additional thermal processes to a logic process flow and the impact from this extra thermal budget becomes more considerable with continued device scaling. This paper investigates the mechanism of SRAM VMIN degradation in a 40nm embedded NVM process and provides a solution to address the degradation caused. Failure analysis shows enlarged poly grain size...
The low-k time-dependent dielectric breakdown (TDDB) mechanisms in misaligned via chain structures are studied. The results show that for small and medium inline misalignments, the spacing reduction effect due to via protrusion dominates the variations of failure time distribution, and sqrt-E model can describe the correlation with good accuracy. In the case of larger misalignments, two process related...
In advanced technology node, the complexity of process, materials selection and limitation of tools' capability, becomes very challenging with respect to meet tight reliability targets. In our fabrication of low-k based BEOL integration scheme, we have demonstrated that by proper inline process characterization, feedback and control at critical process modules, a robust Time Dependent Dielectric Breakdown...
In this paper, investigation of wire bonding, bumping and assembly related failures are performed using optical microscopy, secondary electron microscopy and transmission electron microscopy. Also, the understandings of the failures and root causes are presented. For example, corrosions caused by contaminant such as Fluorine and Cu precipitates on Al-Cu alloyed bond pads that lead to discolored or...
The bimodality of upstream electromigration (EM) failures in the dual damascene structure of 45 nm Cu interconnection process with low-k material is investigated, and the improvement is demonstrated. Two major early failure modes with voids forming in via or at the chamfer of via-trench transition area are revealed and attributed to liner process weakness at the respective locations, which can be...
Stress migration (SM) and electromigration (EM) are key reliability concerns for advanced metallization in nanoscale CMOS technologies. In this paper, the interaction between these two mechanisms is studied in dual-damascene Cu/low-k interconnects. It is found that these mechanisms are not independent; EM failure time could be strongly affected by the presence of residual stress induced by SM, causing...
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