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This paper presents a complete on-chip ADC BIST solution based on a segmented stimulus error identification algorithm known as USER-SMILE. By adapting the algorithm for efficient hardware realization, the solution is implemented towards a 1Msps 12-bit SAR ADC on a 28nm CMOS automotive microcontroller. While sufficient test accuracy is demonstrated, the solution is further extended to correct linearity...
•high-precision/performance analog/mixed-signal IP must be proven in silicon before it is ever designed into a product. •successful characterization of high-precision/performance analog/mixed-signal IP is hard and requires extreme attention to detail on all fronts. •best practices in each of the following areas have been presented: test chip design-lab set up and equipment-evaluation board design-data...
Corner (best- and worst-case) models have been a mainstay of integrated circuit design for decades. Obviously they can be effective, especially for digital CMOS design. However, there are significant inaccuracies that arise when digital CMOS corner models are used for analog circuits, or any types of circuits or measures of circuit performance they were not targeted for. This paper details what corner...
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