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A Single Input Dual Output (SIDO) wide input range piezoelectric energy harvester is proposed. A low drop out semi-active rectifier is implemented. The system extracts energy from vibrations whose rectified output voltage ranges from 100mV to 1.65V and a single inductor buck-boost converter is implemented to cater this dynamic wide input range. Maximum Power Extraction from the source is accomplished...
This paper presents a novel fast transient suppression technique to improve the transient response of dc-dc converters with minimal area overhead and power dissipation. The proposed pseudo error voltage technique is implemented in AMS 0.35μm high-voltage CMOS process for wide supply range automotive dc-dc converter. For 18 V to 3.3 V conversion, the proposed technique suppress overshoot voltage from...
A complete system for single solar-cell fully on-chip micro-scale energy harvesting is proposed. To maximize the extracted output power over the entire illumination range, optimal frequency operation and reconfigurable adaptive switch sizing techniques have been discussed. A fully digital illumination change detection block and a reconfigurable VCO/CCO (Voltage/Current Controlled Oscillator) scheme...
A new approach for a battery-less 915MHz ISM band wake-up receiver with digital decoder for wireless sensor network is designed and presented. The proposed receiver architecture is based on a differential rectifier with gate-driver circuit using an ON-OFF Keying modulation for the input signal. To enhance the power conversion efficiency (PCE) of the rectifier for the low input power level, appropriate...
This paper proposes on-chip soft-start method with minimum extra components and turbulence free start up of dc-dc converter. During the soft start, the output voltage is slowly increased to the steady state value so that the inrush current and overshoots are prevented. The proposed topology is implemented in buck converter designed to give 3.3V output for wide supply range of 4.5V to 18V and load...
A thermo-electric energy harvesting based regulator system with output power maximization for high conversion ratio and very low input voltages, suitable for low power biomedical applications is presented. An optimal control topology for an inductor based regulator is implemented. Zero Current Switching is achieved by Pulse Width Modulation. Feedback mode control regulates output voltage to 1V with...
A fully passive printable Quick Response (QR) code embedded chipless RFID (Radio Frequency Identification) technique is presented for secure identification of alive and nonalive amenity. A series of QR codes are printed in the form of a resonator in passive RFID tag, and the coded information is retrieved through frequency domain reflectometry method for identification. The design is demonstrated...
This paper proposes a novel method for ripple cancellation in multi-phase converters. Unlike the conventional multi-phase converter, the proposed topology can cancel the ripple irrespective of the duty ratios. The proposed topology is designed to give 3.3V output for wide supply range of 4.5 to 18V and load range of 0 to 3A in AMS 0.35um high-voltage CMOS process. Transistor level simulation results...
This work proposes an energy efficient wearable CMOS biomedical signal acquisition and digitization scheme powered by RF energy harvesting circuit. The system consists of a ultra-low power analog front end (AFE) incorporating low noise instrumentation amplifier (IA)(CMRR=75dB), two programmable gain amplifiers (PGA), mixed signal automatic gain control (AGC) and a successive approximation register...
This paper presents, a complete energy harvesting system with improved implementation of Fractional Open Circuit Voltage (FOCV) technique, to mitigate obligation of using off chip sampling capacitor, gratuitous periodic open circuit operation for Maximum Power Point Extraction (MPP) from solar cell. A possible solution to minimize the reverse current in solar cell due to abrupt decline in irradiance...
A maximum power point tracking DC-DC boost converter and reconfigurable rectifier to harvest energy from ambient RF source in an auto-configurable mixed converter mode is presented. A reconfigurable rectifier with adjustable rectifier stages in the high input power range(−16dBm to −8dBm) and a boost converter with adaptive control in the low input power level range(−26dBm to −17dBm) to maximize the...
This paper describes a mixed-signal electrocardiogram (ECG) system for personalized and remote cardiac health monitoring. The novelty of this paper is fourfold. First, a low power analog front end with an efficient automatic gain control mechanism, maintaining the input of the ADC to a level rendering optimum SNR and the enhanced recyclic folded cascode opamp used as an integrator for $\Sigma \Delta $ ...
A low noise amplifier (LNA), mixer, quadrature voltage controlled oscillator (QVCO) and low pass filter (LPF) (overall called as QLMVF Cell) in two active stages for 2.4GHz ZigBee and Bluetooth low energy (BLE) direct conversion receiver is designed and presented. To achieve low power, QVCO, LNA and split trans-conductance amplifier (TCA)s are sharing bias current in the first stage. Similarly, trans...
This paper proposes a PLL architecture targeting ZigBee (ZB) and Bluetooth LE (BLE) band. It employs a single-well, direct back-gated Quadrature Voltage Controlled Oscillator (QVCO). An efficient, Integer-N, Multi Modulus Divider (MMD) using True Single Phase Clock (TSPC) logic is incorporated in the design to minimize the overall PLL power consumption. The QVCO gives phase noise of −110 dBc/Hz at...
This work proposes an ultralow power highly linear analog front-end (AFE) with an input dynamic range from 200µVpp to 20mVpp. The system consists of a signal conditioning instrumentation amplifier (IA), two programmable gain amplifiers (PGA), a mixed signal automatic gain control (AGC), two sample and hold (S/H), a 10 bit successive approximation register (SAR) analog to digital converter (ADC), and...
In the radio frequency (RF) front-end, LNA with good noise figure without degrading performance a very important component to be developed. This paper presents design of two topologies of current reuse based Low Noise Amplifier (LNA) with low noise figure. LNA1 describe the fully integrated narrow band Differential Merged LNA-Mixer (DMLNAM) with two current reuse paths and LNA2 describes fully integrated...
This work presents an ultra-low power 10-bit, 1-KS/s successive approximation register (SAR) analog-to-digital converter (ADC) for biomedical applications. To achieve the nano-watt range power consumption, an ultra-low-power design technique has been utilized, inflicting maximum simplicity on the ADC architecture and low transistor count. ADC was designed in 180nm CMOS technology with a 1-V power...
This paper presents proof of concept of a low hardware complexity time domain quantizer (TDQ) for wideband multibit countinuous time (CT) ΣΔ ADCs. Besides rendering multi-level quantization of the input signal, the proposed scheme generates a two-level loop feedback signal for the modulator. The two-level feedback eliminates the errors emanating from component mismatches in the feedback digital-to-analog...
This paper proposes a novel single-well VCO in PLL architecture targeting ZigBee (ZB) and Bluetooth LE (BLE) band. It employs PMOS based charge recycling technique in Voltage Controlled Oscillator (VCO) and a Current Mode Logic (CML) divider for I-Q generation in single-well CMOS. An efficient, low current, Integer-N, Multi Modulus Divider (MMD) using True Single Phase Clock (TSPC) logic is incorporated...
This paper presents ultra low power hybrid energy harvesting start-up circuit for 1V , implemented in a standard 0.18 µm CMOS technology. It consists of solar and RF energy harvesters, capable to harvest ambient solar and RF sources respectively. The start-up circuit enables operation of the system even in the absence of any one of these ambient energy sources. The integration of solar and RF on a...
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