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In this paper, we report, for the first time, corner effect analysis in the gate-all-around equilateral triangular silicon nanowire (NW) junctionless (JL) nMOSFETs, from subthreshold to strong accumulation regime. Corners were found to accumulate and deplete more electrons than the flat sides or the channel center, when above (local accumulation) and below (local depletion) the flat-band voltage,...
In this work we report dense arrays of highly doped gate-all-around Si nanowire accumulation-mode nMOS-FETs with sub-5 nm cross-sections. The integration of local stressor technologies (both local oxidation and metal-gate strain) to achieve ≥ 2.5 GPa uniaxial tensile stress is reported for the first time. The deeply scaled Si nanowire shows low-field electron mobility of 332 cm2/V.s at room temperature,...
In this work we report an experimental study on accumulation-mode (AM) gate-all-around (GAA) nMOSFETs based on silicon nanowires with uniaxial tensile strain. Their electrical characteristics are studied from room temperature up to ∼400 K and carrier mobility, flat-band and threshold voltages are extracted and investigated.
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