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Based on the width determination of any current-driven connection for electromigration and IR-drop avoidance, an area-driven multiple-source routing tree can be firstly constructed to minimize the total wiring area with satisfying the current flow in Kirchhoff's current laws and the electromigration and IR-drop constraints. Furthermore, some Steiner points can be assigned onto feasible locations to...
The concept of merging some 1-bit flip-flops into a multi-bit flip-flop is applied to reduce dynamic clock power and decrease the total flip-flop area in a synchronous design. To acquire these advantages, the design must be guaranteed to satisfy certain physical constraints in the merging process. In this paper, given a set of 1-bit flip-flops with the input and output timing constraints, the area...
Given a set of connecting nodes in a signal net with a set of obstacles on different layers for 3D ICs, based on the refinement of minimum routing region and the concept of hidden Steiner-point assignment on the same layer or different layers, a merging-based approach is proposed to construct a timing-driven 3D rectilinear Steiner tree with obstacle avoidance. Compared with a spanning-tree-based approach,...
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