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Strain techniques have been adopted and widely used in the advanced nodes since early 65nm for carrier mobility improvement. For PMOS, eSiGe incorporation in the SD is the process of choice to induce compressive strain in the channel for mobility improvement. To further lower the contact resistance, it is preferred to boost Boron concentration for pSD formed by eSiGe process. Normal implant process...
In this letter, for the first time, the integration benefits of a molecular carborane (CBH-C2B10H12) implant on a state-of-the-art 28-nm logic flow are demonstrated and discussed via advanced modeling. It is shown that, by integrating CBH, pLDD formation can be optimized to provide device benefits via profile/damage engineering.
Owing to its deep diffusion requirement for discrete power diode of rating above 400 V and 1 A, the time and temperature for p+ and n+ diffusion of a typical p+nn+ discrete power diode are around 1100degC and more than 36 hours. This represents tremendous power consumption in the manufacturing of power diode. In this work, we propose an alternative method for producing the discrete power diode which...
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