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Instruction level parallelism is one of the basic ways of increasing the performance of current processors. One method to improve instruction parallelism is the chain technique, which bypasses execution results from one Arithmetic Logic Unit (ALU) to others. However, this technique cannot be used with the current superscalar processor scheduling method. We develop a scheduling method for the chain...
This paper studies task scheduling algorithms which schedule a set of tasks on multiple cores so that the total scheduling length is minimized. Most of the algorithms developed in the past assume that a task is executed on a single core. Unlike the previous algorithms, the algorithms studied in this paper allow a task to be executed on multiple cores. This paper proposes six algorithms. All of the...
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