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In this work, we demonstrate a new concept for realizing high threshold voltage (Vth) E-mode GaN power devices with high maximum drain current (ID, max). A gate stack ferroelectric blocking film with charge trap layer, achieved a large positive shift of Vth. The E-mode GaN MIS-HEMTs with high Vth of 6 V shows ID, max 720 mA/mm. The breakdown voltage is above 1100 V.
The behavior of random telegraph noise was affected by nickel silicide barrier height engineering in advanced nano-CMOS technologies. Contact resistance fluctuations with magnitude of up to 40% were observed when a Schottky barrier was reduced to 0.2 eV. The large contact resistance instability is attributed to the barrier modification by positive charge trapping and detrapping in a Schottky contact...
We present a study of cycling induced degradation of a two transistor Flash memory cell with a shared floating gate. The cell directly serves as a configurable interconnection switch in a Field Programmable Gate Array (FPGA) fabricated with a 65 nm embedded-Flash process. By optimizing the poly re-oxidation, LDD implant and spacer module, the cell endurance is significantly improved at both the single...
A compact model has been developed to capture the variability of flicker noise resulting from the reduction in size of state of the art MOSFETs. The underlying physics of flicker noise in small area MOSFETs has been verified by two means: Monte Carlo simulation and analytic modeling. The statistical distribution of flicker noise is reported for the first time, supported by experimental data from two...
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