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The ROBSY approach is able to autonomously generate highly flexible FPGA-based test instruments for structural testing of printed circuit boards (PCBs). This paper deals with the development of an essential part of ROBSY: the test-processor. It is specialized for board-level testing and includes configuration parameters for the adaptation to the specific test case. The level of adaptation is essential...
This paper describes a new method to model timing constraints for the generation of basic control functions for embedded test instruments in the area of structural testing of printed circuit boards. It describes how the timing information is extracted from data sheets, modeled in a domain specific language and processed to obtain the shortest possible test time for the automatically generated embedded...
This paper presents a study of FPGA test-processor configurability at the instruction set architecture (ISA) level used for board-level interconnection testing. The ISA configurability is used as adaptation mechanism to the test requirements, the FPGA properties, and the devices under test (DUTs). The aim is to show the advantages and limitations of processor configurability at this level, and demonstrate...
This paper describes an FPGA based embedded test system, designed for testing of printed circuit boards during the manufacturing process. The test system architecture is automatically generated based on a layer description, which provides the required flexibility for the generation of the test system, and for the abstraction of the test functions. The test system is composed of a software and a hardware...
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