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This paper presents a comparison of throughputand end-to-end latency of synchronous and asynchronous heterogeneousNoC under uniform and exponential traffic conditionsusing different parameters. The parameters we have chosen areno. of cores, load (traffic) and no. of VCs of a router. Further, sinkbandwidth analysis of synchronous and asynchronous NoC underuniform traffic was studied and compared. The...
This paper presents architecture of CORDIC, embedded with a scaling unit that has only minimal number of adders and shifters. It can be implemented in rotation mode as well as vectoring mode. The purpose of the design is to get a scaling free CORDIC unit preserving the design of original algorithm. The proposed design has a considerable reduction in hardware when compared with other scaling free architectures...
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