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This paper presents a V-band power amplifier in a bulk 65 nm CMOS technology with the peak gain 14.5 dB and 3-dB bandwidth of 28.8 GHz (50.8 GHz to 79.6 GHz). The PA has demonstrated 15.1 dBm Psat and 18.9 % peak PAE. The PA features three stage transformer coupled differential architecture with integrated input and output baluns. The entire PA core occupies 0.31 mm2 chip area and dissipates about...
A 60 GHz vector-sum phase shifter with a continuous full-360° phase-shifting range is proposed. The employed I/Q network is optimized to fit the varied load impedance of the different states of the adder. A measured low root-mean-square (rms) phase error and rms gain error of less than 2.5° and 1 dB are observed from 56 to 64 GHz, respectively, to offer a phase resolution of 5-bit or better. The phase...
In this paper, a highly integrated direct conversion receiver MMIC for high speed E-band wireless communication is presented. The receiver consists of 3-stages LNA, doubler with buffer amplifier, and IQ-mixer. The LNA, doubler and IQ-mixer are also presented separately. The LNA covers 75 to 90 GHz with 15 dB gain and a simulated minimum 5 dB noise figure; doubler covers 75 to 90 GHz with 8 to 12 dBm...
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