The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A power- and area-efficient Low Voltage Differential Signaling (LVDS) AC coupled receiver for short links is presented. The receiver accommodates the wide LVDS common-mode range without requiring large, board-mounted AC coupling capacitors or a slow, rail-to-rail input stage. Instead, a small, on-chip coupling capacitance generates a pseudo return-to-zero (RZ) pulse that is latched into the receiver...
This paper reports the design and measured results of a multi-octave low noise amplifier (LNA) and a frequency-agile LNA utilizing a 0.25 μm gallium nitride (GaN) integrated circuit process technology for multi-band receiver applications. The demonstrated broadband LNA covers an instantaneous bandwidth from S- to C-bands (2.2-7.0 GHz), and the frequency-agile LNA cumulatively spans across 3 distinct...
This paper proposes a satellite receiver filter design using FIR digital filtering technique. We present various design methods like windowing, least squares and equiripple for satellite burst demodulator application and compare their performance. Various designs of FIR filter are compared from the view point of hardware complexity, frequency response characteristics and implementation strategies...
This paper reports on the successful demonstration of radio frequency (RF) components in support of an integrated wide band/high dynamic range X-band receiver in 180-nm fully-depleted (FD) SOI CMOS technology. The demonstrated microwave monolithic integrated circuit (MMIC) includes an X-band low noise amplifier (LNA), Marchand balun, balanced amplifiers, double balanced mixer, non-reflective filter,...
A 576 Mb DRAM is implemented with 16 serial links at 10.3125Gbps. Using careful memory/SerDes/package co-design, the system achieves 14.5ns latency and 24.75GByte/s read/write bandwidth. It achieves SRAM-like random access by using logic-compatible 65nm GP embedded DRAM and small 36 Kb sub-arrays with hidden refresh.
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.