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Managing power consumption in a System-On-Chip (SoC) design is becoming increasingly important. SoCs generally consist of various co-processors. Accurate power estimation of these co-processors at the highest possible abstraction level helps in performing early power-aware design tradeoffs. This paper presents a methodology to create abstract statistical power models for hardware co-processors and...
Accurate and efficient power estimation at higher-levels of abstraction is becoming increasingly important. However, tools and methodologies are lacking for such a task. In this paper, we present a methodology for accurate power estimation at high-level by reusing pre-existing verification or validation resources in the design flow. This novel methodology enables architectural exploration and design...
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