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In this paper, the effects of the thickness of the multiplication region (Tm), the sheet charge density of the charge control layer (Dc) and the guard ring design to a separate absorption, grading, charge, and multiplication InGaAs/InP single photon avalanche diode (SPAD)'s performance are numerically discussed. Optimized Tm and Dc are designed for a SPAD. Implanted guard ring is revealed to be easier...
For NiSi FUSI gate transistors, switching behaviors have been observed after breakdown (BD) under certain favorable conditions. The conductive BD path can be ??switched-off?? if a reverse bias, as opposed to the stressing voltage, is applied, a condition required for observing SET and RESET conduction in switching material systems. Using the percolation model of BD of gate dielectric systems, we explain...
We review compact modeling techniques that enable a surface-potential-based approach to modeling MOS transistors. These include symmetric linearization method, an analytical approximation of surface potential and surface potential-based extrinsic device model. General techniques are illustrated by application to the PSP model.
We present an improved procedure for extracting parasitic capacitance parameters and gate current parameters for MOSVAR, the industry standard MOS varactormodel. Our technique is verified against measured data from three technology nodes (180 nm, 130 nm and 65 nm), and is also used to validate the MOSVAR P-gate/P-well tunneling current sub-model.
Based on the combination of the genetic and Levenberg-Marquardt algorithms, a new method is developed to perform both local and global parameter extraction for the PSP MOSFET model. It has been successfully used to extract parameter sets for a 65-nm technology node. Numerical examples demonstrate its ability to obtain highly accurate model parameter values without excessive computational cost.
1/f-like noise measurements of gate leakage current (Ig) at the different stages of progressive breakdown (BD) confirm that a percolation path in ultrathin gate dielectrics could grow from an unstable physical structure in digital BD into a stable physical structure in analog BD. A model involving E'-centers and neutral oxygen vacancies is developed to explain the digital fluctuation and the digital-to-analog...
This paper reports recent progress on partially depleted (PD) SOI modeling using a surface potential based approach. The new model, called PSP-SOI, is formulated within the framework of the latest industry standard bulk MOSFET model PSP. In addition to its physics-based formulation and scalability inherited from PSP, PSP-SOI captures SOI specific effects by including a floating body simulation capability,...
The spline-collocation-based non-quasi-static model is extended to include small-geometry effects and to enable both small-signal and large-signal simulations. The new NQS model has been implemented into circuit simulators using both SP and PSP models and verified using RF test data. Additional verification is provided by comparison with the results of numerical simulations and with the MM11 channel...
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